Performance Analysis of ATM Switches with Self-Similar Input Traffic

In this paper, the performance of ATM switches with self-similar input traffic is analyzed. The ATM switch is a non-blocking, output-buffered switch, and input traffic is approximated by a Poisson-Zeta process, which is an asymptotically second-order self-similar process. The upper and lower bounds of the buffer overflow probability of the switch are obtained by stochastically bounding the number of cells arriving in any interval of time. These upper and lower bounds are very tight and give reliable estimates of the buffer overflow probability. The self-similar behavior of traffic has serious implications on the buffer overflow probability of the switches. In contrast to typical ATM traffic models currently considered in the literature, the buffer overflow probability decreases non exponentially with buffer size. This work was supported in part by NSERC Operating grant No. A-8450